[Libre-soc-dev] SVP64 Vectorised add-carry => big int add

[lkcl]

looking at the algorithm
https://libre-soc.org/openpower/sv/bitmanip/appendix/

i am not seeing the top 32 bit of the 64 bit mul actually being used except for overflow.  taking instead 64 bit mul

mulldo RT,RA,RB (OE=1 Rc=0)
mulldo. RT,RA,RB (OE=1 Rc=1)

Pseudo-code:

prod[0:(XLEN*2)-1] <- MULS((RA), (RB))
RT <- prod[XLEN:(XLEN*2)-1]
overflow <- ((prod[0:XLEN] != [0]*(XLEN+1)) &
             (prod[0:XLEN] != [1]*(XLEN+1)))

am i right in thinking that 64 bit mul could be used with 64 bit result not 128 bit?

l.