[Libre-soc-dev] SimdSignal scalar/vector switching and SimdShape.width

[lkcl]

On October 30, 2021 9:43:11 AM UTC, lkcl <luke.leighton at gmail.com> wrote:

>* a new function __call__ to be added to SimdScope which takes a
>module parameter

https://git.libre-soc.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/part/simd_scope.py;h=2f7e264db7eef56136ec6f28e8563dcdb196d848;hb=HEAD#l69

done, this is a little clearer/shorter than e.g. with oldscope.copy_but_override_module(m) or something

>* SimdScope to be permitted to have module=None

done.

still TODO, detect module=None.

this will have ramifications for the usage: although it will be possible to declare SimdShapes, it's not going to be possible to have SIMD Signals outside of the Elaboratables they are used in.

i thought originally, it would be ok to actually modify the pipeline data structures so as to pass SimdSignals within them, but because of the need to have a Module so that SimdSignal can create its own submodules this isn't practical.

fortunately with casting it becomes possible to have data structures that remain scalar but are uocast on input to the relevant Elaboratable inside a given ALU and downcast on output.

l.