[Libre-soc-dev] LibreSOC Implementation on arty7 fpga dev boards.

varun mohan varunmadhavam at gmail.com
Sun Oct 10 12:47:16 BST 2021


> ahh, excellent: now you are free and clear to report it upstream with the
vpr developers.

How do I do this exactly..!..Create an issue in the github repo or
something else..!!!?

Regards
Varun

On Sun, Oct 10, 2021 at 3:29 PM lkcl <luke.leighton at gmail.com> wrote:

>
>
> On October 10, 2021 6:50:07 AM UTC, varun mohan <varunmadhavam at gmail.com>
> wrote:
>
> >> 4) *manually* install the *upstream* version of
> >>     vpr and you will find instructions that Veera has
> >>     done on how to do that, at:
> >>     https://bugs.libre-soc.org/show_bug.cgi?id=654
> >
> >Did this, but got the same segmentation fault error.
>
> ahh, excellent: now you are free and clear to report it upstream with the
> vpr developers.
>
> they will need the input files used by the command, if you don't exactly
> know all of them you may have to use strace to catch file-open syscalls,
> it's very verbose but you will get everything.
>
> l.
>


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