[Libre-soc-dev] SimdSignal library
Jacob Lifshay
programmerjake at gmail.com
Fri Oct 1 09:06:23 BST 2021
On Thu, Sep 30, 2021 at 11:50 AM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> On Thu, Sep 30, 2021 at 7:21 PM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > > it looks like it's fantastic work - why did you go ahead with it without
> > > discussion?
> > >
> >
> > i did discuss...a week ago:
> > https://bugs.libre-soc.org/show_bug.cgi?id=708
>
> no: you said, "i'm going to do X", and did not respond when i pointed
> out that it would not be a good idea to ABANDON existing work
> without first completing it
sorry for not responding till now...the way you phrased it gave me the
impression that you were totally against working on a version
including the more flexible SIMD layouts (that support lane-sizes that
need padding) until the existing less-flexible design was fully
implemented and tested and documented. I'm 100% convinced we will need
more flexible SIMD layouts when we try to implement SIMD FP, as well
as them making most the rest of the code that will need partitioned
SIMD easier to write -- therefore I think we should work on more
flexible SIMD layouts now since we would only need to adapt the
PartitionedSignal code we wrote in the past, rather than both in the
past as well as all the future PartitionedSignal code we will write
before switching to the more flexible layouts. Therefore, I thought it
wise to build a small proof-of-concept to demonstrate how the more
flexible SIMD layouts would work -- that turned into what simd_signal
is now.
> > based on what you have done please can you provide time estimates
> > > to complete:
> > >
> > > * unit tests
> > >
> > 2 weeks
>
> there's no chance that that's accurate. it's taken me a day to do
> Cat, and another day to do Assign.
Well, it took me 1 day (today) to do both SimdCat and SimdRepl with
both traditional unit tests and formal tests and that's including all
the time I took building a general tester that supports both Simulator
and formal testing.
The actual amount of time needed to add SimdRepl to the test for both
sim/formal is on the order of 5min (mostly just copy-pasting SimdCat's
unit test):
https://salsa.debian.org/Kazan-team/simd_signal/-/commit/b77b188c51c91c3ddfdd6f41c9e22e0bfa5d41e3
> can you please break it down by the list of operators - all of them - and give
> estimates based on a per-operator, per-function, per-unit test basis.
> a *full* list of *all* unit tests planned to be written.
I won't write out a full list of unit tests since that would take
about as much time as actually writing the unit tests.
I write out the list of operations and test time estimates:
Note, the following list includes both unit tests and formal proofs
(yay SimdValueTester class I just wrote that does both!)
SimdCat, SimdRepl: done.
SimdValue.bool(): 5min
~ -: 5min total
+ -: 5min total
*: 10min (longer cuz I anticipate running the unit tests to take
forever, not cuz writing the code will take all that long)
% //: 5min total
<< >> shift_left shift_right rotate_left rotate_right: 10min total
& | ^ implies: 7min total
== != < <= > >=: 15min total
abs(): 5min
slicing: 30min
as_unsigned(), as_signed(): 5min
any(), all(), xor(): 5min
bit_select(), word_select(), SimdPart: 10min
matches(): 1hr
Mux(): 5min
Array(): not supported until we *really* need it...can we skip implementing it?
SimdModule.If/Elif/Else: 2-3 days
SimdModule.Switch/Case/Default: 4-5 days
(not actually writing tests): fixing bugs that are revealed by the
tests: a week or two
>
> > > * formal correctness proofs
Included in above estimate, since all we need is to call
SimdValueTester.run_formal instead of SimdValueTester.run_sim
> > > * where the funding is coming from.
> > >
> > we can use the If/Switch budget?
>
> then what budget is used to complete the if/Switch work?
idk, the left over part?
Jacob
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