[Libre-soc-dev] daily kan-ban update 03may2021

[Luke Kenneth Casson Leighton]

On Monday, May 3, 2021, Tobias Platen <libre-soc at platen-software.de> wrote:

> today: unit tests dcache ld/st, maybe error handling.
> For the first unit test I was thinking about using a large rom
> implemented as a python directory.


you probably mean dictionary.


> After that a read/write test could be done.


it _should_ be possible to base it off of the rom one.  you will have to
check in TestRunner if the extra wb sim process does read/write.

line 445

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/test/test_runner.py;h=29824df08a43967ef077aa95d4a85d47af66c224;hb=e2f40b45fd234e70bd69eb195e4d3fe47943993b#l445

can it do write?

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/experiment/test/test_mmu_dcache.py;h=0748a05a8815e4323a6a2d5fc524f8747a1e2186;hb=e2f40b45fd234e70bd69eb195e4d3fe47943993b#l87

no it can't, only read.  that will need sorting, and carefully: probably
the first thing to do.

have to bear in mind, the write must respect the "sel" bits.  and, the
result dictionary might not have a value in it.

so use this:

   val = wb.data.get(addr, 0)

do NOT use wb.data[addr]

then use the bits of sel as a bitmask, one per byte, and update val.


l.



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