[Libre-soc-dev] [OpenPOWER-HDL-Cores] XLEN in scalar spec pages

Luke Kenneth Casson Leighton lkcl at lkcl.net
Mon Jun 21 04:16:00 BST 2021

hiya Paul more later after a re-read (or three). yes i definitely
meant "cut register files to 32 bit" in order to save huge amounts of
gates / LUT4s for new scenarios not previously envisaged by IBM or
Motorola when they were the only major players.

including FP which has interesting implications as to "what is now the
meaning of fadd vs fadds".

in SV we decided "fadd" means "IEEE754 XLEN" and "fadds" means
"IEEE754 XLEN/2 in XLEN bitspace" so when element widths are
overridden to XLEN=32 fadds becomes IEEE754 FP16 stored in 32 bits.

when elwidth is overridden to XLEN=16 then it is *fadd* which performs
FP16 operations *but uses the entire 16 bits to do so*.

a 32 bit only v3.N processor could likewise also use fadds for IEEE754
FP16 saving gates for specialist embedded applications including ML.
all of that of course assumes a market interest from some vendor.


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