[Libre-soc-dev] daily kan-ban update 14jun2021
libre-soc at platen-software.de
Mon Jun 14 19:47:18 BST 2021
On Mon, 2021-06-14 at 19:43 +0200, Tobias Platen wrote:
> today: continuing to work on mmu/dcache.
> Recently I found a bug in src/soc/fu/ldst/loadstore.py that causes
> wrong data to be written into the cache.
Fixed the test case, now I am looking for a proper solution for
set_wr_data which needs to latch the data in, as it is written
to the cache later. Just using a comb assignment will fail here.
def set_wr_data(self, m, data, wen):
# do the "blip" on write data
m.d.comb += self.d_valid.eq(1)
# put data into comb which is picked up in main elaborate()
m.d.comb += self.d_w_valid.eq(1)
# FIXME latch data in
m.d.comb += self.store_data.eq(data)
m.d.sync += self.store_data_sync.eq(data)
st_ok = self.done # TODO indicates write data is valid
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