[Libre-soc-dev] SVP64 parallel map-reduce idea

[Luke Kenneth Casson Leighton]

On 6/13/21, Jacob Lifshay <programmerjake at gmail.com> wrote:

> The example actually runs the reduce twice, once with a non-trivial
> predicate, followed by once with an all-true predicate. you probably
> confused the two outputs with each other.

ah ok thank you.

hm.

then... a couple of options present themselves:

1) the algorithm you wrote is used as-is (which is a good one) as the
canonical definition for parallel mapreduce

2) given that there is a serial mapreduce we don't have a parallel
one, instead replace it with prefix-sum.

the serial one has an advantage that it inherently can and has to cope
with carry-in, carry-out.

question: does the following result in prefix sum behaviour:

gpr(RT) = gpr(RA)
for j = 0 to vl-1:
   for i = 0 to j:
      gpr(rt+j) = OP( gpr(ra+i), gpr(rb+i) )

because if so that's again ironically and elegantly exactly the same
as the twin-predicate case, except rather than always incrementing
srcstep snd dststep, dststep sits still on an outer loop and srcstep
moves on.

hmmmm.... hmmm.... i have another idea... crossproduct as well... hmmmm