[Libre-soc-dev] SVP64 parallel map-reduce idea

[Luke Kenneth Casson Leighton]

if temp_pred[i] && other_pred {
    temp_vec[i] += temp_vec[other];

hm.

if that is changed to

        GPR[RT+i] = OPERATION(GPR[RA+i],  GPR[RA+other])

i think we have the "general purpose" register-based prefix-sum system.
the "normal" way it would be used would be:

      sv.add/mr 1.v, 1.v, 10.v

really strange and mind-bending things start to happen if this is attempted:

     sv.add/mr 1.v, 3.v, 10.v

but i see no reason to ban that.

also: the inner loop may be srcstep, whilst *step* - which is multiplied by
2 each time - may be dststep.  "other" may be calculated on-demand.

temp_pred... temp_pred has me a little concerned.... oo, actually...
if we had an instruction that did exactly that (bitwise), what other
uses could it be put to?

l.