[Libre-soc-dev] Caramaba! Encore raté!

Jean-Paul Chaput Jean-Paul.Chaput at lip6.fr
Mon Jun 7 08:56:27 BST 2021

Hello All,

Despite my best efforts I was not able to complete the chip on time.
However this time is really a close call as I estimate that I need
between two and three days to complete and all the drawbacks I can
think of are accounted for.

The last stopper were the last antenna violations in some specific
places. To suppress antenna violation I insert diodes along the
path. But to do so, I need the wire to be *above* the core area
and not over a macro-block (SRAM & PLL). And in some instances
it is wrong:

1. Connexions to the output I/O pads : on three instances, the pad is
   too far from the driver and long wires are drawn *outside* the
   core area and in a "low" layer (METAL3) so any diode inside
   the core would be effective "too late" in the fabrication
   process (i.e after METAL4 is done).

2. Address lines of the SRAM, in three instances the same problem
   occurs for the SRAM block address lines.
     The same configuration occurs : the diodes put in the core
   are connected when the METAL4 for is fabricated and the METAL3
   part connecting to the address input is long enough by itself
   to triggers the antenna.

Good solution would be to put protection diodes directly integrated
to the inputs of SRAM and I/O pads.

Quick solution : add a METAL5 or METAL6 jumper just before the inputs.
That I can do, but not at one o'clock in the morning. It will take
between one and three days to implement & check.

Again with my deepest apologies.

But this time is the last time I postpone as the chip is really close
to completion.

Best reagards,

      .-.     J e a n - P a u l   C h a p u t  /  Administrateur Systeme
      /v\     Jean-Paul.Chaput at lip6.fr
    /(___)\   work: (33)              
     ^^ ^^    cell:   home:

    U P M C   Universite Pierre & Marie Curie
    L I P 6   Laboratoire d'Informatique de Paris VI
    S o C     System On Chip

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