[Libre-soc-dev] HDMI, DVI, DisplayPort on SBC (like Raspberry Pi) and on BMC

[Jacob Lifshay]

On Mon, Jan 25, 2021, 10:23 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> On Monday, January 25, 2021, Jacob Lifshay <programmerjake at gmail.com>
> wrote:
> > We should seriously consider using DisplayPort instead of HDMI, it
> supports
> > nearly all the same features, can be implemented without requiring
> > closed-source firmware since HDCP is optional, and supports higher
> > resolutions and other more modern stuff than DVI.
>
> this is some good research.
>

well, it's mostly just a brain dump, I didn't research anything today.

>
> DVI is directly pin-compatible with HDMI, it is the broken/braindead HDCP,
> transferred over the DVI wires, that "makes" it HDMI.
>
> i have absolutely no problem with leaving out HDCP, or at least providing a
> way for software implementations of it.
>
> the problem with leaving out HDMI:
> * you can't use TVs as monitors

* some TVs esp. at higher resolutions flatly refuse to communicate DVI-only
>

DVI support is a requirement of the HDMI spec, so they should support it.
DVI itself is limited though.

>
> the problem with leaving out both HDMI and DVI:
> * eDP is nowhere near the adoption rate
>

in desktop computers DisplayPort is near 100% adoption in new devices, been
that way for a few years. In fact a few of the new video cards don't even
support anything but DisplayPort iirc.

>
> the problem with eDP:
> * it'a nowhere near as ubiquitous as say LVDS, RGBTTL or even MIPI.
>

Yeah, I was talking mostly about external video outputs (full DP, not eDP),
having LVDS for board-internal display output is reasonable. We should try
to pick an internal video protocol that supports variable refresh rate,
since that is a major power saver in low-power devices. In fact, that's
what variable refresh rate was originally designed for iirc.

>
> much as i despise MIPI it has low-power benefits for this SoC.
>
>
> > DVI:
> > * simple/cheap
> > * patent licensing is free
> > * max resolution is 1920x1200 at 60Hz, 1080p60 is supported
> > * no audio
> > * no variable refresh rate (though we might be able to get it to work by
> > breaking the spec).
>
> i have not confirmed it but i believe this may not be quite correct: the
> I2C channel transfers EDID data just like with VGA. add that I2C channel
> and i would be very surprised if it didn't just "work".
>

well, DVI and HDMI and DisplayPort all have/require the I2C channel, I was
assuming we'd implement it. I've never heard of variable refresh rate
working in DVI mode, though. The display would probably just send different
compatibility EDID data when connecting using DVI.

>
> > * no high bit-depth
> > * forward compatible with HDMI (can run over same HDMI physical
> connector,
> > you can get wires-only cheap (~$5) adaptors to physical DVI-D connector
> for
> > old monitors).
> >
> > DisplayPort:
> > * HDCP optional
> > * patent licensing is free
> > * supports >4K, high refresh rate, variable refresh rate (important for
> > power-saving and games), high bit-depth (HDR and better color gamut than
> > sRGB).
> > * supports audio output
> > * works over USB type-C
> > * the modern standard for computer monitors
> >
> >
> > So, I think we should have 1 DisplayPort output (perhaps shared with USB
> > type-C) if we're licensing someone elses design, as well as 1 DVI-D over
> a
> > HDMI connector for physical compatibility with TVs that only support HDMI
> > and older monitors that only support DVI.
>
> i agree this is sane / sensible / workable. i have no idea how to cost it
> up though.
>
> bear in mind though that SoCs are RADICALLY different from "The Average
> Intel quotes mobile quotes processor" where they think 8 Amps @ 0.6 v is
> "low".
>

DisplayPort is a supported output in many modern cell phones via usb-c, so
the power draw can't be that awful...

>
> power draw and raw data bandwidth for 4k monitors is MENTAL.
>

yup, hence why we might recommend only using 1080p or 1440p for the 1x32
DDR3/4.

>
> i found a datasheet online for DDR4 that estimated power consumption for
> "high performance" (lots of FIFOs, 8x AXI4 Buses) DDR4 and it was ONE WATT.
>
> that's insane: it's 30% of the entire power budget for the entire SoC.
>
> we likewise have to be extremely careful about the interface selection
> itself, to ensure that driving eDP (which unlike MIPI was never designed
> for low-power scenarios) is not overloading the power budget.
>

yup, hence why we can use a different interface for internal display for
very-low-power scenarios, if needed. Variable refresh rate also helps.

Jacob