[Libre-soc-dev] synchronised incremental SV development planning
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Fri Jan 22 14:45:07 GMT 2021
On Friday, January 22, 2021, Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:
> On Fri, Jan 22, 2021 at 10:35 AM Cesar Strauss <cestrauss at gmail.com>
wrote:
>
>> On 01/21/2021 10:38, Luke Kenneth Casson Leighton wrote:
>> > who would like to do what?
>>
>> I can be in charge of adding an increment-based hardware for-loop to the
>> TestIssuer FSM.
>
> great! i can cover ISACaller.
https://libre-soc.org/openpower/sv/implementation/
i created this page as we need to coordinate.
bugtracker tasks to be created and linked on there.
jacob can i put you down for the c++ macros? this and the python ones are
critical path. actually the python ones are more important because at this
stage everything is driven from test_pipe_caller unit tests.
l.
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