[Libre-soc-dev] daily kan-ban update 06dec2021

[Luke Kenneth Casson Leighton]

today and yesterday is a minor diversion into dcache.py and icache.py,
which, looking at the yosys graphs (taking a long time) looked very scary.

a number of duplicated signals (cache ram read/write addresses duplicated)
and associated complex critical-path muxes.  PLRUs and other repeated
blocks (QTY 64) with binary-comparators enabling them. a royal dog's dinner
mess - nothing i'd ever think should end up in silicon.

i'm slightly happier with them both, now: the batch of PLRUs are moved to
their own module (and use one-hot encoders to activate).

next task is to work out how to do setup of TestIssuer with MMU RADIX tree
pre-loaded, in order to see if userspace LD/ST can trigger a Virtual Memory
lookup.

after that, investigate adding in I-Cache.

l.

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