[Libre-soc-dev] [RFC] SVP64 on branch instructions

[Jacob Lifshay]

On Sun, Aug 1, 2021, 06:32 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> https://libre-soc.org/openpower/isa/branch/
>
> it occurs to me only just now that we completely forgot to evaluate
> SVP64 interaction on branches, particularly when bc involves CRs.
>
> ...
>
> should modes be added which check *all* CR fields bring tested, or
> just one, or add a bit to select either?
>

GPU code will need to very often branch if all/any predicate bits are
set/clear, having a branch op that covers all 4 combinations would save a
bunch of instructions (>5-10% in some common cases).

Jacob