[Libre-soc-dev] ls180 update

[Jacob Lifshay]

On Fri, Apr 16, 2021, 07:05 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> quick update:
>
> * marie-minerve of lip6.fr has tagle running on an extracted netlist from
> a
> small test, it does transistor level static timing analysis.  with that
> passing the next thing to try is ls180
> https://www-soc.lip6.fr/equipe-cian/logiciels/tasyagle/


fyi that's not open-source -- license:
https://www-soc.lip6.fr/equipe-cian/logiciels/tasyagle/license-upmc/

>
>
> * staf has run SPICE and other DRC on the 4K SRAM block, it passed
> simulations.
>
> * i have been doing JTAG ghdl cocotb simulations of pre and post layout,
> with a small test, this created a series of errors which Jean-Paul has
> fixed.  the post pnr wishbone test takes several seconds to complete: it
> will be quite fascinating (scary) to run the full ls180.


Jacob