[Libre-soc-dev] cxxsim with jtag connections

[Staf Verhaegen]

On za, 2021-04-10 at 01:42 +0100, Luke Kenneth Casson Leighton wrote:
> On Friday, April 9, 2021, Richard Wilbur <richard.wilbur at gmail.com>
> wrote:
> > Awesome!!
> > Now the onus is on us to create a great testsuite with good
> > coverage andthe depth required to catch errors ideally before we
> > send the design to thefoundry
> 
> the upload program is here:
> 
> https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/debug/firmware_upload.py;hb=HEAD

Could this also be updated to generate .svf files ?Staf.