[Libre-soc-dev] daily kan-ban update 20oct2020

[Tobias Platen]

today: I began wiring everything up,
this includes the registers a and b as well
as the CompMMUOpSubset if I understand everything correctly

def set_fsm_inputs(fsm, dec2, sim):
    # set MMUInputData fields
    yield fsm.p.data_i.ra.eq( TODO )
    yield fsm.p.data_i.rb.eq( TODO )

def check_fsm_outputs(fsm, pdecode2, sim, code):
    # check that MMUOutputData is correct by comparing the output 
    # of the simulator with the mmu output stage
    return None #TODO

-- 
Tobias Platen <libre-soc[at]platen-software[dot]de>