[Libre-soc-dev] daily kan-ban update 15oct2020

[Luke Kenneth Casson Leighton]

On 10/17/20, Cole Poirier <colepoirier at gmail.com> wrote:

> Does this look reasonable to you? By doing these changes I got it to
> work, finally.

good.  now we sort out the dross from what's needed.

read carefully.

> ```
> diff --git a/src/soc/litex/florent/libresoc/core.py
> b/src/soc/litex/florent/libresoc/core.py
> index 81bd0dfc..10ad9396 100644
> --- a/src/soc/litex/florent/libresoc/core.py
> +++ b/src/soc/litex/florent/libresoc/core.py
> @@ -13,7 +13,7 @@ from libresoc.ls180 import io
>
> -CPU_VARIANTS = ["standard", "standard32", "standardjtag", "ls180",
> +CPU_VARIANTS = ["standard", "standard32", "standardjtaggpiotest", "ls180",
>                  "standardjtagnoirq"]

yes.  commit this one line change with an explanation (and the sim.py
below) in the same commit.

do NOT use "git commit -a".

>
> diff --git a/src/soc/litex/florent/sim.py b/src/soc/litex/florent/sim.py
> index c797a43d..bce505d2 100755
> --- a/src/soc/litex/florent/sim.py
> +++ b/src/soc/litex/florent/sim.py
> @@ -49,7 +49,7 @@ class LibreSoCSim(SoCSDRAM):
>          if cpu_data_width == 32:
>              variant = "standard32"
>          else:
> -            variant = "standardjtag"
> +            variant = "standardjtaggpiotest"

yes.

> diff --git a/src/soc/litex/florent/versa_ecp5.py
> b/src/soc/litex/florent/versa_ecp5.py
> index 8774b849..a001476e 100755
> --- a/src/soc/litex/florent/versa_ecp5.py
> +++ b/src/soc/litex/florent/versa_ecp5.py
> @@ -69,7 +69,7 @@ class ULX3S85FTestSoC(ulx3s.BaseSoC):
>              cpu_cls      = LibreSoC,
> -            cpu_variant  = "standardjtag",
> +            cpu_variant  = "standardjtaggpiotest",

no.

>              #cpu_cls      = Microwatt,
>              device       = "LFE5U-85F",
>              **kwargs)
> diff --git a/src/soc/simple/issuer_verilog.py
> b/src/soc/simple/issuer_verilog.py
> index 92ec2f54..fc818e4f 100644
> --- a/src/soc/simple/issuer_verilog.py
> +++ b/src/soc/simple/issuer_verilog.py
> @@ -20,9 +20,9 @@ if __name__ == '__main__':
>
> -    parser.add_argument("--enable-testgpio", action="store_true",
> +    parser.add_argument("--disable-testgpio", action="store_true",
>                          help="Disable gpio pins",
> -                        default=False)
> +                        default=True)

no.  use the command line option do not change the defaults.

> @@ -51,7 +51,7 @@ if __name__ == '__main__':
>                           xics=args.enable_xics, # XICS interrupt controller
>                           nocore=not args.enable_core, # test coriolis2
> ioring
>                           use_pll=args.use_pll,  # bypass PLL
> -                         gpio=args.enable_testgpio, # for test purposes
> +                         gpio=args.disable_testgpio, # for test purposes

please don't change names to "disable" after i went to the trouble of
changing them to "enable".

>                           debug=args.debug,      # set to jtag or dmi
>                           units=units)
> ```
> Cut out some lines that were included in the diff but hadn't been
> changed (i.e. no '+' or '-') to try and cut down on the length of the
> pasted diff.

next time send the whole diff not under the "update" thread and
include the term "[patch]" at the start.

l.