[Libre-soc-dev] c4m-JTAG dependency issues

[Cole Poirier]

On Fri, Oct 9, 2020 at 2:29 PM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
> On Fri, Oct 9, 2020 at 10:27 PM Cole Poirier <colepoirier at gmail.com> wrote:
> > On Fri, Oct 9, 2020 at 2:25 PM Luke Kenneth Casson Leighton
> > <lkcl at lkcl.net> wrote:
> > >
> > > let me know when you have c4m-jtag libresoc branch running.
> >
> > I have it installed... How should I run it?
>
> "it" doesn't run.  you mean, "how do i run the unit test for IOconn testing?"
> python3 debug/test/test_jtag_tap_srv.py

Sorry, you said above to let you know when I had the c4m-jtag
libre-soc branch running... I think so. `git branch` produces only
`*master` because I cloned via ssh from git.libre-soc.org. Git config:

```
remote.origin.url=gitolite3 at git.libre-soc.org:c4m-jtag.git
remote.origin.fetch=+refs/heads/*:refs/remotes/origin/*
branch.master.remote=origin
branch.master.merge=refs/heads/master
```

I just ran `python3 debug/test/test_jtag_tap_srv.py`, it prints the
following and stops, which to me, naively seems to 'work', but noting
your comment (https://bugs.libre-soc.org/show_bug.cgi?id=511#c6) of
"still not quite right: ioconn3.core.i is inverted. hm" I'm assuming
there's some ground truth we can compare against, what would that be?


```
io3 pad.oe 0
        dmi wen, addr 0 0
        read ctrl reg 4
        dmi wen, addr 0 1
dmi ctrl status 0x4
        dmi wen, addr 0 0
        read ctrl reg 4
        dmi wen, addr 1 0
        write ctrl reg 5
        dmi wen, addr 0 1
dmi ctrl status 0x4
        dmi wen, addr 0 0
        read ctrl reg 5
        dmi wen, addr 0 1
dmi ctrl status 0x5
        dmi wen, addr 0 3
        read msr reg
        dmi wen, addr 0 4
dmi msr 0xdeadbeef
wb write 0x0
wb read 0xfeef
jtag sim stopping
dmi sim stopping
jtag srv stopping
```

Cole