[Libre-soc-dev] All div pipe tests pass

[Jacob Lifshay]

On Wed, Oct 7, 2020, 12:38 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> On 10/7/20, Jacob Lifshay <programmerjake at gmail.com> wrote:
> > On Wed, Oct 7, 2020, 05:22 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
> > wrote:
> >
> >> On Wed, Oct 7, 2020 at 6:00 AM Jacob Lifshay <programmerjake at gmail.com>
> >> wrote:
> >> >
> >> > On Tue, Oct 6, 2020 at 9:42 PM Luke Kenneth Casson Leighton
> >> > <lkcl at lkcl.net> wrote:
> >> > >
> >> > > On 10/7/20, Jacob Lifshay <programmerjake at gmail.com> wrote:
> >> > > > I got all the div fu tests to pass by fixing the ISA spec and
> fixing
> >> > > > the one bug I found in the div fu.
> >> > >
> >> > > briiiliant.
> >> > >
> >> > > that's good in two ways because we can propose the pseudocode for a
> >> v3.0C spec.
> >> >
> >> > Still need to convert all `undefined` references in those instructions
> >> > to 0 bits though.
> >>
> >> i "solved" that one by (in the simulator) defining the variable
> >> "undefined" to 0b00000000000000000000000000000000...
> >>
> >> proposing to OPF two inter-related things at once is probably not a
> >> good idea.  they should really be separate discussions, not least
> >> because the variable named "undefined" is used in multiple places.
> >>
> >
> > My plan for div is to just remove references to undefined, not removing
> the
> > definition of undefined.
>
> the thought of removing "undefined" without the OpenPower Foundation's
> ISA WG approval has me slightly alarmed.
>

How about instead making a function `undef` that can be used as follows:

def undef(v):
    """returns a value that is undefined according to the spec, but the
hardware returns `v`."""
    return v

def my_fake_opcode(RA):
    RT[0:64] = EXTS64(RA[32:64])
    if RA < 0:
        RT[0:32] = undef(0x12345678)
    return (RT,)

that allows saying that part of the result should be undefined while still
specifying the value our tests should match (which is not always zero).

Jacob