[Libre-soc-dev] pinmux / peripheral generator

[Luke Kenneth Casson Leighton]

not up to coding todsy, did some thinking about the pinmux and
peripheral / infrastructure / interconnect.

bear in mind that there are multipke tasks needed:

* peripheral specification (quantity and name)
* CSRs (memory addresses for configuration of peripherals)
* generation of header files of the same
* peripheral multiplexing including GPIO mapping
* creation of devicetree
* creation of documentation
* allocation of interrupts to peripherals
* creation of header files of the same
* memory maps for peripherals and buses
* creation of bus interconnect infrastructure for the same

it's a big list, covered by litex partly and by opentitan and by the
shakti bluespec pinmux generator that i wrote in 2018 for IIT Madras
RISE Group.

the lesson learned from the bluespec template generator and ftom
opentitan is that templating is an exceptionally bad idea.  this
leaves AST generation such as migen and nmigen as the "sane" method.

however as you can see above it's actually a hell of a lot of work:
the bluespec template generator took 3 months all-in and still did not
generate header files or devicetree.

my thoughts are that litex already does about... 50% of what's needed.
it autogenerates the interconnect, matches bus widths automatically,
has a suite of peripherals predefined, and so on.  integration with
verilator is particularly nice.

what it lacks is:

* stability due to the use of migen
* control over CSR allocation although this is to be addressed
* header file generation
* devicetree generation

it does however have JSON file output which coukd be used to create
"3rd party stuff".

the other options are nmigen-soc which is unfortunately still in its
very early stages.

any others out there?

l.