[Libre-soc-dev] early FPGA reverse-engineered

[Tobias Platen]

On Sun, 4 Oct 2020 12:56:19 +0100
Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:

> http://www.righto.com/2020/09/reverse-engineering-first-fpga-chip.html
> 
> some very interesting design decisions, like: the bitstream goes into
> a shift register and literally enables rows/columns directly.  no
> "interpretation" by the FPGA.
> 
> l.
> 
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I already know.

-- 
Tobias Platen <libre-soc[at]platen-software[dot]de>