[Libre-soc-bugs] [Bug 1004] FPGA bring up for platform definitions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1004

--- Comment #15 from Cesar Strauss <cestrauss at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #14)
> (In reply to Cesar Strauss from comment #13)
> > However this brings a massive regression when building ls2 for Arty...
> > Routing no longer converges on that design, it goes on forever.
> 
> worth reporting, with repo instructions.

Sure. I think the openXC7 project is already aware of regressions upstream
regarding routing, they mention:

"This release backports all the latest changes on the old, stable codebase,
giving you the best stability and performance. Further development will be made
to both branches, until the upstream branches' router2 issues (like endless
loops), will be solved."

> if that is easily a drop-in replacement, same commands, it may be
> worth adding and commenting a link to this bugreport.

It is a direct drop-in replacement yes, even build instructions are the same,
just adjust the git repo and hash.

Even Litex now accepts "openxc7" as an alternate toolchain for Xilinx devices.

> they *may* take merge/fixes upstream at some point

The author seems to be a major contributor upstream, many of their pull
requests are already there.

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