[Libre-soc-bugs] [Bug 950] pysvp64asm: support insndb-based assembly for SVP64 instructions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=950

--- Comment #18 from Dmitry Selyutin <ghostmansd at gmail.com> ---
(In reply to Dmitry Selyutin from comment #15)
> There are 4 failures so far in disassembler test when the new assembly is
> used.
>
> 4. test_15_predicates fails on `sv.extsw/dm=eq/sm=gt 3,7` instruction.
> According to pysvp64asm, it should have failed before: extsw is P2, and we
> cannot have different twin predicates.
> https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/
> trans/svp64.py;h=c61e92833d696d46c50bf715c898b33a3100aa49;hb=refs/heads/
> master#l1285

Almost fixed, I found the issue.

(In reply to Dmitry Selyutin from comment #16)
> 
> If that backward compatibility is essential

For now I've introduced a backward compatibility layer for disassembly (called
Style.LEGACY for obvious reasons). svp64dis is now also capable of this.

I managed to get some tests working, including svstep. The rest is in progress.

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