[Libre-soc-bugs] [Bug 1147] support Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in binutils (except byte reverses)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1147

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |programmerjake at gmail.com

--- Comment #2 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Dmitry Selyutin from comment #1)
> I've checked binutils and can confirm that instructions cntlzdm, cfuged,
> pextd, pdepd, brh, brw, brd, setbc, setbcr, setnbc are all present as
> vanilla binutils instructions.
> All of them are missing in SVP64-related code, though. I'll add them.

there's also setnbcr, which should also be in binutils but not as SVP64 yet.

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