[Libre-soc-bugs] [Bug 1147] support Scalar Power ISA v3.1 (32-bit-only) instructions (no PO1) in binutils (except byte reverses)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1147

--- Comment #1 from Dmitry Selyutin <ghostmansd at gmail.com> ---
I've checked binutils and can confirm that instructions cntlzdm, cfugeD, pextd,
pdepd, brh, brw, brd, setbc, setbcr, setnbc are all present as vanilla binutils
instructions.
All of them are missing in SVP64-related code, though. I'll add them.

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