[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

--- Comment #27 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
 227         if self.stages[0] is not None:

same.

if self.stages[0] is None:
    return Stall
and deindent.

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