[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

--- Comment #26 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
 158 
 159     def process_instructions(self, stall):
 160         if len(self.stages) > 0:

deindent 161-173 and invert the above.

 159     def process_instructions(self, stall):
 160         if len(self.stages) == 0:
                  return stall
             ....
             ....


don't waste precious indentation space when there is an 80
char (79 char) limit.

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