[Libre-soc-bugs] [Bug 1039] add hardware-cycle-accurate stastistical modelling to ISACaller for an in-order core

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1039

--- Comment #23 from Andrey Miroshnikov <andrey at technepisteme.xyz> ---
(In reply to Andrey Miroshnikov from comment #22)
> 
> https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;
> h=ed7797d8288cc9701d070a82884ebe74816b0232

Missed the second commit:
https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=755b918d6dad6fc2d1a2a75beb1fdd39223679c7

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