[Libre-soc-bugs] [Bug 1068] add instructions from ls012 not currently implemented in binutils

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Apr 27 20:47:11 BST 2023


https://bugs.libre-soc.org/show_bug.cgi?id=1068

--- Comment #11 from Dmitry Selyutin <ghostmansd at gmail.com> ---
(In reply to Dmitry Selyutin from comment #6)
> After sorting and checking the list, I got these entries:

Correction: I've checked the rest in openpower-isa semi-automatically
(basically checking which entries are determined by insndb and then manually
inspecting the repo). Below are my  findings.

The list of what we have now is even shorter. Here are instructions which were
identified by insndb and can be used as candidates for binutils at this stage:

dsld
dsrd
maddedus
divmod2du
minmax
absdu
ffmsubs
ffmadds
ffnmsubs
ffnmadds
fdmadds
ffadds


Below is the list of missing instructions, with few comments where relevant, no
comments imply there're no traces of the instruction at all:

fminmax -- only mentioned in fields.text
absaccs
absaccu
crrweird
mfcrweird
mtcrrweird
mtcrweird
crweirder
mcrfm
fptstp
fptstps
fmvtg
fmvtgs
fmvfg
fmvfgs
fcvtfg
fcvtfgs
fcvttg
fcvttgs
ffadd -- only present in svfparith.mdwn, but has no relevant CSVs
ffsub -- only present in svfparith.mdwn, but has no relevant CSVs
ffmul -- only present in svfparith.mdwn, but has no relevant CSVs
ffmuls -- present in svfparith.mdwn and power_enums.py, but has no relevant
CSVs
ffdiv -- only present in svfparith.mdwn, but has no relevant CSVs
ffdivs -- present in svfparith.mdwn and power_enums.py, but has no relevant
CSVs
fdmadd
fdmadds
ffmadd -- only present in comment in power_decoder2.py
ffmsub
ffnmadd
ffnmsub

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