[Libre-soc-bugs] [Bug 1073] New: Microwatt verilator sim - setting up chroot and documentation

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1073

            Bug ID: 1073
           Summary: Microwatt verilator sim - setting up chroot and
                    documentation
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: andrey at technepisteme.xyz
          Reporter: andrey at technepisteme.xyz
                CC: libre-soc-bugs at lists.libre-soc.org, lkcl at lkcl.net
            Blocks: 961
   NLnet milestone: NLnet.2022-08-107.ongoing

I've setup a new Libre-SOC wiki page documenting the exact order of
instructions I followed to set up a new chroot for working with Microwatt for
documentation and reproducibility.
Currently stumbling on the same issue I've had back in January
https://libre-soc.org/irclog/%23libre-soc.2023-01-25.log.html#t2023-01-25T11:10:47
https://libre-soc.org/irclog/%23libre-soc.2023-01-27.log.html#t2023-01-27T05:30:02
https://libre-soc.org/irclog/%23libre-soc.2023-01-30.log.html#t2023-01-30T10:05:14

-Libre-SOC wiki page: https://libre-soc.org/HDL_workflow/microwatt_tutorial/


The Libre-SOC microwatt tutorial shows the following command to time how long
the sim takes to run:
(microwatt):$ time ./microwatt-verilator

No additional arguments to the binary are specified.

As I've covered on the wiki page, the hello_world binary is loaded into RAM at
synthesis, so compiled verilator sim should already have the program loaded.
In the Makefile,
https://git.libre-soc.org/?p=microwatt.git;a=blob;f=Makefile;h=610f48d8c89be6d5b9902d7f1bf61f8b6d98ffc0;hb=refs/heads/verilator_trace
`RAM_INIT_FILE` (line #144) is specified as `hello world.hex` (the Microwatt
'light bulb' example code).
The Makefile uses this `RAM_INIT_FILE` argument for generating the
`microwatt.v` verilog file (line #249).
Finally, to generate the `microwatt-verilator` binary, `microwatt.v` is pulled
in as a dependency (line #254).

However, even after running for over 18min on a Ryzen 3600 and verilator set to
11 threads, no terminal output appears.


Please help me understand what I'm missing.


What would really help is some way to measure the progress of the simulation
(and that it's not just sitting, running NOPs).

(This bug might be in the wrong category, perhaps documentation is better?)


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=961
[Bug 961] NLnet 2022 Libre-SOC "ongoing" milestone 2022-08-107 (approved, MoU
TBD)
-- 
You are receiving this mail because:
You are on the CC list for the bug.