[Libre-soc-bugs] [Bug 888] ls180 PLL port to sky130 needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=888

--- Comment #2 from Dimitri Galayko <dimitri.galayko at lip6.fr> ---
I have succeeded to port the generator written for the PLL in 180nm TSMC
technology to skywriter 130 technology. The new generator is based on the
ngspice tool and python libraries, which makes it fully "open source". 

The generator based on Jupiter notebooks provides a working PLL ngspice netlist
defined as a sub circuit, which is ready to be tested under different
conditions (Vdd, input reference frequency, etc.). 

The developed design methodology is described in the attached documents. 

The netlist of one version of the generated PLL is given here. The full sources
of the generator allowing one to generate netlists with different parameters
are about to be provided on the GitHub of LIP6, the link will be given shortly.

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