[Libre-soc-bugs] [Bug 890] Static Timing Analysis of eth_mac

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=890

--- Comment #59 from Marie-Minerve Louerat <marie-minerve.louerat at lip6.fr> ---
Static Timing Analysis of the SRAM architecture.
With optimized P&R (regular).

The configuration and scripts are available in :

https://gitlab.lip6.fr/vlsi-eda/alliance-check-toolkit/-/commit/84b388879e793c9f3da427b2016d34f694f2644f

SRAM is 256x32
Using TSMC 180 process
C4M-FlexCell library

Results can be reproduced with :

  * coriolis commit #288d1c70
  * alliance-check-toolkit commit #84b38887

following the README_timing.rst flow
and using TSMC180 PDK (under NDA)

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