[Libre-soc-bugs] [Bug 890] Static Timing Analysis of eth_mac

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=890

--- Comment #55 from Marie-Minerve Louerat <marie-minerve.louerat at lip6.fr> ---
Update scripts for static Timing Analysis of spram_256x32

Static Timing Analysis of spram_256x32
Target process : SkyWater130
Standard Cells : C4M-FlexCell lib
Transistor model for HiTas : BSIM4 SkyWater130, level = 14

Showing 5th longest paths provided by HiTas
and other timing data : setup and hold times, timing access of output.

The study (synthesis, P&R, simulation, STA) can be reproduced using:

  * Coriolis commit #288d1c70
  * alliance-check-toolkit commit #8d679b20

and benchs/spram_256x32/sky130_c4m directory, 
following the README_timing.rst instructions.

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