[Libre-soc-bugs] [Bug 745] OP_TERNLOG instruction

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=745

--- Comment #62 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/irclog/%23libre-soc.2022-05-17.log.html#t2022-05-17T00:41:29

> programmerjake	oh, lkcl, reading through your modifications to
> bitmanip, crbinlog imho should take the look-up table from a GPR rather
> than a CR. this will make it much easier to generate.	00:41
> programmerjake	much easier to use in user code because CR's are
> generally conditions rather than arbitrary binary values.	00:41

unfortunately there's nowhere near enough space in the opcode

| 0.5|6.8 | 9.11|12.14|15.17|18.22|23...30  |31|
| -- | -- | --- | --- | --- |-----| --------|--|
| NN | BT | BA  | BB  | BC  |m0-m2|00101110 |m3|

* the 4-bit mask selects which CR Field gets updated
* BC contains the LUT2 which happens to be 4-bit
* BT BA BB BC are a total of 12 bits.

i'm nervous about using some of the 5-bit XO table
(the one above the 10-bit XO which this instruction
 is already intruding on)

but more than that, the crweird instructions allow for more powerful
nibble-based transfer between GPR and CR Fields, including merging
and also that special mode where QTY 2of CR Fields can be put into
the 8 LSBs of a GPR.

i kinda like the idea, though, let me take a look / reminder of what
crweirds do.

-- 
You are receiving this mail because:
You are on the CC list for the bug.