[Libre-soc-bugs] [Bug 762] Peripheral Pin Muxing Development

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Jan 24 12:28:40 GMT 2022


--- Comment #10 from Andrey Miroshnikov <andrey at technepisteme.xyz> ---
(In reply to Luke Kenneth Casson Leighton from comment #9)
> if you go for option (2) then yes, of course.
Went for that option.

> option (1) would be very wasteful of IO memory address space because each
Noted, just thought this through while making the new diagrams.

> Chips4Makers IOpads, which is what we are targetting, do not have
> an "input enable" flag on the public API.
> however this is not a "deterrent" or an actual "problem": we will
> need a "mapping" system anyway, if you recall.  but, for now, let's
> *provide* an ie on the csrbus but *ignore* it as far as connecting
> to padlayout is concerned.
Sure, makes sense.

> > What do you mean by having the same types as IOTypes?
> you can work out the answer easily to that for yourself by examining
> the source code.
Sure, not important at the moment so I'll look into it later.

Now, onto some important updates:
>From discussion on bug #764, you mentioned wanting a diagram to try to
understand the GPIO/JTAG topology.
Please see the proposal section 4.5.1 on the pinmux page

If this makes sense, I'll carry on with adding the relevant controls to the
GPIO block.

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