[Libre-soc-bugs] [Bug 764] Documentation of I/O Core/Pad JTAG Tests

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=764

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #1)
> I've updated the GPIO section of my temporary documentation page:
> https://libre-soc.org/docs/pinmux/temp_pinmux_info/

looks great

> As for merging with the main pinmux page, is it worthwhile to have a page on
> the theory (the pinmux), and the implementation (temp_pinmux_info, but with
> a new name)?

yyeah i think that's a good idea.
[btw can you put a width on this
https://libre-soc.org/docs/pinmux/io_mux_bank_planning.JPG
in the tag you can set width=800 or size=800x something
like that, there's loads of examples, grep the mdwn files]

> For example, the current section 4 which covers the GPIO block can go into
> the main page, however the testing and brief code explanation can be on the
> second page.

yeah go for it

> Also, let me know if 500EUR is an appropriate budget, and what else should
> be documented before the bug can be closed.

it can always go up later

the idea i had was that when setting to "mux bank 7" this indicates that
the IOpad is to be connected to JTAG boundary scan.  if this is _not_ done.
the only other way is to have double-MUXing, which introduces yet more
gate delay.

i haven't fully thought this through, i'd have to see it as an actual
diagram, when we get to combining the pinmux with JTAG BS.  but, whatever
is done, it needs to be documented because it will surprise the heck out
of people otherwise

-- 
You are receiving this mail because:
You are on the CC list for the bug.