[Libre-soc-bugs] [Bug 755] add grev instruction (OP_GREV)

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jan 18 05:10:22 GMT 2022


--- Comment #24 from Jacob Lifshay <programmerjake at gmail.com> ---
Added grev to BitManipTestCase, also had to spend a bunch of time fixing bugs
in the pseudo-code and working around bugs in the simulator...(I don't want to
spend the time right now to solve #765).

I added a log2 helper function .. I figured that's probably fine because I
designed it to assert if the input isn't an integer power of 2, so its function
is basically always totally obvious imho. It's needed so I can properly index
into a field where I need the lsb log2(XLEN) or log2(XLEN/2) bits, and
OpenPower *loves* MSB0, making it extra annoying:

just look at this mess:
grevw's pseudo-code:
    result <- [0] * (XLEN / 2)
    a <- (RA)[XLEN/2:XLEN-1]
    b <- EXTZ64(RB)
    do i = 0 to XLEN / 2 - 1
      idx <- b[64-log2(XLEN/2):63] ^ i
      result[i] <- a[idx]
    RT <- ([0] * (XLEN / 2)) || result

we'll want to do that slicing RB too for the shift/rotate instructions cuz that
makes the behavior more consistent (always shifting by RB_OR_IMM % XLEN).

when I tried using % in grevw's pseudo-code, the LHS was 5 bits wide, and
XLEN/2 was 32, which overflows 5 bits, causing it to wrap around to RB_OR_IMM %
0 which obviously raises a ZeroDivisionError.

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