[Libre-soc-bugs] [Bug 980] New: Implement C-based Power ISA pseudocode compiler

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=980

            Bug ID: 980
           Summary: Implement C-based Power ISA pseudocode compiler
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: ghostmansd at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---
 total budget (EUR) 5500
  for completion of
       task and all
          subtasks:
   budget (EUR) for 5500
         this task,
          excluding
  subtasks' budget:
    parent task for 939
 budget allocation:

One of the most important stages once we're able to understand which
instruction we're going to simulate, we need a way to specify the actual logic
behind the instruction. We already have human-readable specification in
Markdown format, and successfully used it for our reference Python-based
simulator. We need to follow the same approach for cavatools, and generate the
code for all PowerISA instructions.

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