[Libre-soc-bugs] [Bug 824] New: Adding wire RC to the layout extractor (Solstice)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=824

            Bug ID: 824
           Summary: Adding wire RC to the layout extractor (Solstice)
           Product: Libre-SOC's second ASIC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: source code
          Assignee: lkcl at lkcl.net
          Reporter: Jean-Paul.Chaput at lip6.fr
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

Adding limited electrical information extraction (wire resistance and
capacitance) to the new layout extractor (Solstice).

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