[Libre-soc-bugs] [Bug 819] New: Add LVS capabilities to Coriolis

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=819

            Bug ID: 819
           Summary: Add LVS capabilities to Coriolis
           Product: Libre-SOC's second ASIC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: source code
          Assignee: lkcl at lkcl.net
          Reporter: Jean-Paul.Chaput at lip6.fr
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

There is already an implementation of connections extractor (Solstice) and a
gate-level LVS (Equinox). Their algorithms are sound and efficient *but* they
where *very* *very* badly implemented. It is quicker to rewrite them from the
algorithm than to try to correct them.

1. Rewrite Solstice.

   1.a For pure netlist interconnect.
   2.b Add RC interconnect (in a format that can be fed to Elmore
       delay).

2. Rewrite Equinox. With special emphasis on producing understandable
   trans-hierarchical error messages.

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