[Libre-soc-bugs] [Bug 806] Nest should be able to run at different clock rate than main CPU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=806

--- Comment #21 from tpearson at raptorengineering.com ---
(In reply to Luke Kenneth Casson Leighton from comment #20)
> (In reply to tpearson from comment #17)
> 
> > There's one rather obvious option that hasn't been applied here either --
> > what about simply paramaterizing the DRAM clock names at module
> > instantation?
> 
> can you explain (with an illustration) what you mean "parameterising
> the DRAM clock names"?

On deeper investigation, it looks like the DomainRenamer may do what we need
here.

However, the gram tree right now contains a bunch of instances of "dramsync". 
>From where I sit we need to change those back to "sync" so that the renamer is
consistent, it's just plain confusing at the moment and I think this was the
origin of some of my misconceptions...

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