[Libre-soc-bugs] [Bug 806] Nest should be able to run at different clock rate than main CPU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=806

--- Comment #6 from tpearson at raptorengineering.com ---
I still want us to stop thinking of the CPU and fabric all running at the same
clock speed -- any real-world ASIC will not have that "feature"...

I can move the arbiter after the downconverters, but I'll probably end up
creating a couple of different peripheral clock domains because both Tercel and
the DRAM controller can use the higher clock speeds for higher bandwidth.

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