[Libre-soc-bugs] [Bug 800] Coriolis2 to add LVS capability

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=800

Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
    parent task for|                            |748
  budget allocation|                            |
    NLnet milestone|NLNet.2019.Coriolis2        |NLnet.2021-08-049.coriolis2
 total budget (EUR)|50000                       |6000
  for completion of|                            |
       task and all|                            |
           subtasks|                            |
   budget (EUR) for|0                           |6000
         this task,|                            |
          excluding|                            |
   subtasks' budget|                            |
                 CC|                            |lkcl at lkcl.net
            Summary|Coriolis Enhancements       |Coriolis2 to add LVS
                   |                            |capability

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
- porting and updating of older (Alliance) layout extractor tools
    (solstice, equinox) to newer (c++/python) coriolis2 as pure
    netlist extractor:
- PRIORITY: resistance and capacitance extraction.

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