[Libre-soc-bugs] [Bug 784] Implement cl* instructions for carry-less operations

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=784

--- Comment #17 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #10)
> (In reply to Luke Kenneth Casson Leighton from comment #6)
> > my intuition tells me that this may prove useful, to replace the use
> > of an adder.
> > 
> > https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/ripple.py;hb=HEAD
> 
> actually that ripple logic is exactly what I was trying to avoid...it would
> generate a 64-deep chain of gates. binary addition is optimized by yosys to
> use carry look-ahead (they can be depended on not to break that since it
> would make all binary arithmetic have such a huge latency that basically all
> cpus using yosys would no longer meet timing).

that's sound logical reasoning, i like it.

then that makes Ripple() borked (i checked: it's borked), which is quite
serious as it's intended for use extensively in PartitionedSIMD operators
and for the Vector opcodes "set-before-first" (etc).
https://libre-soc.org/irclog/%23libre-soc.2022-04-05.log.html#t2022-04-05T20:34:16

can you fix Ripple() then use it here?

> > relying on yosys to spot that certain gates are redundant is not sensible.
> 
> it's perfectly sensible since the xor gates have unused outputs therefore
> they are trivially removed by `opt` (after the addition is converted to
> individual gates).

yep. looks sound logic to me, there, too.

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