[Libre-soc-bugs] [Bug 698] ls180 ASIC test tasks

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=698

--- Comment #2 from Staf Verhaegen <staf at fibraservi.eu> ---
I think a block diagram of the SoC and a memory map of the IP blocks would also
come handy during testing.

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