[Libre-soc-bugs] [Bug 50] nmigen pinmux

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=50

--- Comment #36 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to andrey from comment #35)
> (In reply to Luke Kenneth Casson Leighton from comment #34)
> > nggggh i just realised: enumeration of the pad ports was masking the
> > actual inputs/outputs
> > 
> >     def get_input(self, pin, port, attrs, invert):
> >         (res, pin, port, attrs) = self.padlookup[pin.name]
> > 
> > should have been:
> > 
> >     def get_input(self, pin, port, attrs, invert):
> >         (padres, padpin, padport, padattrs) = self.padlookup[pin.name]
> > 
> > ngggggh.  there are *six* pieces of information to wire up.
> 
> After your explanation about ports here:
> https://libre-soc.org/irclog/%23libre-soc.2021-11-16.log.html
> I added the changes to get_input_output(). The code runs, and the yosys
> diagram is quite a bit more complex...

excellent.

> 
> Can you confirm this is the behaviour we need Luke?

not at all! that's a unit test's job.

-- 
You are receiving this mail because:
You are on the CC list for the bug.