[Libre-soc-bugs] [Bug 739] NGI POINTER Gigabit Router Pinout Considerations

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=739

--- Comment #15 from Jean-Paul.Chaput at lip6.fr ---
(In reply to Luke Kenneth Casson Leighton from comment #14)
> (In reply to Jean-Paul.Chaput from comment #13)
> 
> >   I've loosely followed this discussion up until now, I'm not sure
> >   to follow exactly what the question is. Are there specific
> >   routing constraints to manage? If so, could you draw a schematic
> >   or a figure of the layout you expect ?
> 
> yes, here is a page i wrote in advance with some diagrams:
> https://libre-soc.org/docs/pinmux/
> 
> all of this is combinatorial logic, no clocks at all.
> 
> https://libre-soc.org/docs/pinmux/gpio_block.png
> 
> the green (out) mux and the red (out) mux are *in addition* to
> the JTAG Boundary scan muxes:
> 
> https://libre-soc.org/shakti/m_class/JTAG/jtag-block.jpg

  OK. I get the idea. One more question regarding the various clocks:
  how widespread are they *in* the design? I mean, making a whole
  H-Tree across *all* the area if only a very specific part is
  concerned would be a waste. We may want to either create a
  sub-block with it's localized H-Tree, or develop a specific
  ad-hoc buffering version for one clock.

-- 
You are receiving this mail because:
You are on the CC list for the bug.