[Libre-soc-bugs] [Bug 730] adapt ALU test cases to include expected results

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 9 18:09:48 GMT 2021


--- Comment #29 from klehman9 at comcast.net ---
Ha, horror is a way to describe it.

Not discounting what you wrote at all about bit ordering.  I think we are on
the same page but different paragraphs ;-).

All I'm/it is doing is taking a state object, and creating an expected state
from it.  Those registers are pulled and stored in whatever fashion before that
part hits.  What's in the registers, how it is stored doesn't matter for this
simple compare process.  Those expected cr assignment statements may look weird
but the test will pass through test issuer with flying colors since it will be
comparing an expected state verbatim with whatever last_state was bit ordering
be darned.

Now whether or not that needs to be changed (which now that I have written all
this out...it might have dawned on me that is what you are shooting for), I'm
all ears for that one and that of course would drag the bits into the

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