[Libre-soc-bugs] [Bug 741] bitmanip ALU implementation

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=741

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #2)
> no looks good, remember ternary is 4in RT RA RB RC ternaryi 3in RA RB RT

which means ternaryi should be RT RA TII RC 
because TII drops into RB immediate in DecodeBImm

https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/power_decoder2.py;h=6db5c61511a79a22b6f0eccc570c9018a434d32e;hb=a17a252e474d5d5bf34026c25a19682e3f2015c3#l268

In2Sel.CONST_TII

ternary instr is then "for free"

OP_TERNARY not OP_TERNARYI

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